The Compute Express Link (CXL) Consortium and Gen-Z Consortium have announced their plans to promote interoperability between their technologies, leading to better low latency connectivity.
‘Each technology brings different yet complementary interconnect capabilities required for high-speed communications,’ said Jim Pappas, board chair, CXL Consortium. ‘We are looking forward to collaborating with the Gen-Z Consortium to enable great innovations for the Cloud and IT world.’
CXL and Gen-Z are both memory semantic protocols (read/write) that enable high-speed connectivity to processors, accelerators and memory expansion. Gen-Z Consortium is developing an open-systems fabric-based architecture designed to provide high-speed, low-latency, secure access to data and devices. CXL has developed a high-speed CPU-to-device and CPU-to-memory interconnect designed to accelerate data centre performance.
Gen-Z focuses on fabric connectivity at the rack and row-level, whereas CXL aims to promote coherent node-level computing. It is hoped that combining these protocols will enable memory and storage resource pools in CPUs, GPUs, AI Accelerators or FPGAs to share memory and storage resources at low latency.
‘CXL and Gen-Z technologies work very well together, and this agreement facilitates collaboration between our organisations that will ultimately benefit the entire industry,’ said Gen-Z Consortium president Kurtis Bowman.
